Electronic information is commonly transmitted in the form of data bits, each being a binary "0" (hereafter simply "0") or a binary "1" (hereafter simply "1"). The "0" and "1" values can, for example, respectively represent low and high voltages.
In order to successfully transfer electronic information from a transmitting station to a receiving station, the receiver must be able to distinguish the boundaries of the individual bits in the incoming data stream. While the transmitter and receiver can use precisely matched clocks to facilitate recovering the data, the receiver clock inevitably drifts relative to the transmitter clock. One technique for alleviating the drift problem is to provide the transmitter clock to the receiver so that the receiver clock can be synchronized to the transmitter clock. In Manchester encoding, the transmitter clock is furnished to the receiver by incorporating transmitter clock signals in the serial data stream sent out by the transmitter.
Wong et al, U.S. Pat. No. 4,584,695, discloses a decoder which decodes a Manchester-encoded data stream. The transmitter clock in Wong et al is recovered by sampling each incoming Manchester-encoded data bit at three points referred to as the early ("E"), middle ("M"), and late ("L") sampling points.
The voltage curves of FIG. 1 are helpful in understanding the operation of the decoder in Wong et al. The upper curve represents an incoming Manchester-encoded data stream V.sub.RDI. Due to the exclusive ORing used in Manchester encoding, each data bit in the V.sub.RDI stream has a mid-bit transition that corresponds to a transmitter clock signal. A downward mid-bit transition indicates a "0" bit value, while an upward mid-bit transition indicates a "1." The lower voltage curve in FIG. 1 is a receiver clock signal V.sub.R4XCK that runs at four times the main receiver clock.
Clock V.sub.R4XCK, upon being generated by suitable processing of incoming data V.sub.RDI, is used to sample data stream V.sub.RDI at the early, middle, and late points, each consecutive pair of which are separated by 25% of the estimated data bit period. A difference in binary value between the early and late samples indicates the presence of a mid-bit transition. The value of the middle sample indicates whether the receiver clock, and thus also 4X clock V.sub.R4XCK, must be advanced or retarded to match the transmitter clock.
The three-point sampling technique of Wong et al has been useful. However, Wong et al is limited to decoding Manchester-encoded signals having mid-bit transitions that convey the transmitter clock. In addition, the three-point technique of Wong et al indicates whether the receiver clock is to be advanced or retarded but does not indicate how much advancement or retardation is needed. It would be desirable to have a highly accurate sampling circuit which is suitable for upcoming high data-rate applications and which is capable of recovering the transmitter clock from a data stream that does not contain transmitter clock signals. It would also be desirable that such a sampling circuit be capable of providing an estimate of how much the receiver clock should be advanced or retarded to achieve synchronism with the transmitter clock.